How to Implement Full Duplex SPI Communication Using SPI DMA Mode on STM32F2xx or STM32F4xx

written by James YS Kim
javakys@gmail.com

When one try SPI communication on STM32 MCU, he faces its poor throughput. This is because there is too long of an idle time between SPI read/write operations

The below image has the real SPI signals which were captured during the standard SPI communication and you can see the idle time is over 5 times longer than the one byte data communication time.

Figure1. SPI clock capture view in standard mode

STM32 MCU provides a method to enhance the SPI communication throughput by eliminating idle time between SPI read/write operations. It is SPI DMA mode.

Figure 2 shows that transmission and reception of block data is done continuously without any idle time when you use SPI DMA mode.

Figure2. SPI clock capture view in SPI DMA mode

I’ll show you how to enhance the SPI communication throughtput using SPI DMA mode in detail and in stage by stage.

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SPI DMA mode
Not only STM32F2xx or STM32F4xx series but STM32F1xx series have been providing SPI DMA mode for bust data transmission. But there were some reports in which byte shift happens.
STM32F2xx and STM32F4xx series enhanced DMA mechanism to support stable, fast read/write operation.For details, refer to the application note, “AN4031: Using the STM32F2 and STM32F4 DMA controller”, from STMicro.

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Using SPI DMA on STM32F401RE
Here, I’ll explain the way how to use SPI DMA step by step on STM32F401RE supporting the enhanced SPI DMA mechanism. Only system configuration part for using SPI DMA is included and refer to “Upgrade W5500 throughput on Nucleo STM32F401RE Using SPI DMA” for example.

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SPI1 port selection
STM32F401RE supports up to 4 SPIs but SPI1 is selected for SPI communication.

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DMA selection
Additional concepts like Channel and Stream are used in the enhanced DMA mechanism. The DMA Channel and Stream is decided upon which SPI peripheral is selected.
The above application note shows DMA request mapping table, refer to this table for selection of DMA Channel and Stream

Because SPI1 was selected for communication above, Channel3 of DMA2 was selected for SPI1_RX and SPI1_TX, Stream2 will be used for Rx and Stream3 for Tx.

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Implementing code

1. RCC Clock Setting
Make the Peripheral clocks, RCC_AHB1Periph_DMA2 for DMA2 and RCC_APB2Periph_SPI1 for SPI1, ‘Enable’.

RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_DMA2, ENABLE);
RCC_APB2PeriphClockCmd( RCC_APB2Periph_SPI1, ENABLE);

2. GPIO Setting
Set SCLK, MISO and MOSI pin of SPI peripheral to pull-down and map ‘Alternate Function’ to those pins.

GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

Set GPIO_AF_SPI1 as Alternate Function.

/* Connect SPI pins to AF_SPI1 */
GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_SPI1); //SCLK
GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_SPI1); //MOSI
GPIO_PinAFConfig(GPIOA, GPIO_PinSource6, GPIO_AF_SPI1); //MISO

This is the  whole code for GPIO setting..

GPIO_InitStructure.GPIO_Pin = WIZ_SCLK | WIZ_MISO | WIZ_MOSI;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
GPIO_Init(GPIOA, &GPIO_InitStructure);

GPIO_InitStructure.GPIO_Pin = WIZ_SCS | WIZ_nRST;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_SetBits(GPIOA, WIZ_SCS);
GPIO_SetBits(GPIOA, WIZ_nRST);

/* Connect SPI pins to AF_SPI1 */
GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_SPI1); //SCLK
GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_SPI1); //MOSI
GPIO_PinAFConfig(GPIOA, GPIO_PinSource6, GPIO_AF_SPI1); //MISO

3. SPI Setting
Set SPI Direction as FullDuplex and SPI Prescaler with SPI_BaudRatePrescaler_2 which is the fastest one.

SPI_InitTypeDef SPI_InitStructure;

/* SPI Config */
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;

SPI_Init(SPI1, &SPI_InitStructure);

while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET) ;

4. DMA Setting
If the length of data which you will read/write is fixed, then you can set its buffer size, the base address of buffer and so on at the initialization stage. Otherwise, you need to initialize them every time. So you’d better initialize DMA Stream only at the DMA initialization stage.

/* Deinitialize DMA Streams */
DMA_DeInit(DMA2_Stream3); //SPI1_TX_DMA_STREAM
DMA_DeInit(DMA2_Stream2); //SPI1_RX_DMA_STREAM

5. Implementing code for data communication
First, set data byte count to read/write by DMA.

DMA_InitStructure.DMA_BufferSize = (uint16_t)(tx_len + 3);

Second, initialize like below to process DMA by per byte.

DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;

DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(SPI1->DR));
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;

Third, Set DMA Channel3 and DMA2 Stream3 as DMA SPI Tx stream
Set DMA_DIR with DMA_DIR_MemoryToPeripheral because Tx stream sends data in DMA Memory to SPI1(Peripheral)

/* Configure Tx DMA */
DMA_InitStructure.DMA_Channel = DMA_Channel_3;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) pTmpBuf1;
DMA_Init(DMA2_Stream3, &DMA_InitStructure);

Fourth, Set DMA Channel3 and DMA2 Stream2 as DMA SPI Rx stream.
In case of this Rx stream, set DMA_DIR with DMA_DIR_PeripheralToMemory.

/* Configure Rx DMA */
DMA_InitStructure.DMA_Channel = DMA_Channel_3;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) pTmpBuf1;
DMA_Init(DMA2_Stream2, &DMA_InitStructure);

Fifth, add code to control SPI Chip Select

wizchip_select();
…
wizchip_deselect();

Sixth, make DMA Stream enabled and SPI Rx/Tx DMA request enabled then SPI_Cmd enabled.

DMA_Cmd(DMA2_Stream3, ENABLE); /* Enable the DMA SPI TX Stream */
DMA_Cmd(DMA2_Stream2, ENABLE); /* Enable the DMA SPI RX Stream */

/* Enable the SPI Rx/Tx DMA request */
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx, ENABLE);
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, ENABLE);

SPI_Cmd(SPI1, ENABLE);

Seventh, wait until SPI DMA operation finishes, and when done.

/* Waiting the end of Data transfer */
while (DMA_GetFlagStatus(DMA2_Stream3, DMA_FLAG_TCIF3)==RESET);
while (DMA_GetFlagStatus(DMA2_Stream2, DMA_FLAG_TCIF2)==RESET);

Eighth, deselect SPI Chip Select pin, clear DMA Flag, make DMA Stream disabled, make SPI Rx/Tx DMA request disabled and make SPI_Cmd disabled, then DMA transaction is over..

Below is the whole code for data communication using SPI DMA mode.

DMA_InitStructure.DMA_BufferSize = (uint16_t)(tx_len + 3);
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;

DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(SPI1->DR));
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;

/* Configure Tx DMA */
DMA_InitStructure.DMA_Channel = DMA_Channel_3;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) pTmpBuf1;
DMA_Init(DMA2_Stream3, &DMA_InitStructure);

/* Configure Rx DMA */
DMA_InitStructure.DMA_Channel = DMA_Channel_3;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) pTmpBuf1;
DMA_Init(DMA2_Stream2, &DMA_InitStructure);

/* Enable the DMA channel */
wizchip_select();

DMA_Cmd(DMA2_Stream3, ENABLE); /* Enable the DMA SPI TX Stream */
DMA_Cmd(DMA2_Stream2, ENABLE); /* Enable the DMA SPI RX Stream */

/* Enable the SPI Rx/Tx DMA request */
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx, ENABLE);
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, ENABLE);

SPI_Cmd(SPI1, ENABLE);

/* Waiting the end of Data transfer */
while (DMA_GetFlagStatus(DMA2_Stream3, DMA_FLAG_TCIF3)==RESET);
while (DMA_GetFlagStatus(DMA2_Stream2, DMA_FLAG_TCIF2)==RESET);

wizchip_deselect();

DMA_ClearFlag(DMA2_Stream3, DMA_FLAG_TCIF3);
DMA_ClearFlag(DMA2_Stream2, DMA_FLAG_TCIF2);

DMA_Cmd(DMA2_Stream3, DISABLE);
DMA_Cmd(DMA2_Stream2, DISABLE);

SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx, DISABLE);
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, DISABLE);

SPI_Cmd(SPI1, DISABLE);